The present disclosure generally relates to ultra-low dielectric films and methods of forming the same.
Integrated circuits in electronic devices involve semiconductor device fabrication. A sequence of photolithographic and chemical processing steps creates the electronic circuits on a wafer of semiconducting material. Silicon is frequently used as the semiconducting material, although the semiconducting material used depends on the application. The semiconducting wafers are then subjected to front-end-of-line (FEOL) processing and back-end-of-line (BEOL) processing. FEOL processing includes forming the transistors directly in the silicon. BEOL processing includes interconnecting the respective semiconductor devices to form the electrical circuits. In particular, interconnecting metal wires isolated by insulating layers are created. The insulating material can be silicon dioxide or low dielectric constant (k) materials.
As line dimensions are reduced to increase the speed and memory storage capability of microelectronic devices (e.g., computer chips), the insulating requirements for the interlayer dielectric (ILD) become much more rigorous. Reduced size and dimensions in these devices requires a lower k to minimize the RC time constant, where R is the resistance of the conductive line and C is the capacitance of the insulating dielectric interlayer. C is inversely proportional to spacing and proportional to the k of the ILD.
Many of the fabrication steps of very large scale integration (VLSI) and ultra-large scale integration (ULSI) chips are carried out by plasma enhanced chemical or physical vapor deposition techniques. The ability to fabricate an ultra-low k material by a plasma enhanced chemical vapor deposition (PECVD) technique using previously installed and available processing equipment thus simplifies its integration in the manufacturing process, reduces manufacturing cost, and creates less hazardous waste.
Furthermore as electronic devices decrease in size, the thickness of the dielectric insulator film layers accordingly decrease. Thus, the dielectric layers are subject to an increased propensity to degrade, or wear-out, which is known as time-dependent dielectric breakdown (TDDB).
Ultra-low k materials and films having atoms of Si, C, O and H (SiCOH) can be non-porous, or porous. Porous films can be formed by introducing a labile porogen group during the deposition of a preliminary film structure, which is subsequently removed using a conventional curing process. Porous SiCOH films may have a lower k than the corresponding non-porous SiCOH films.
Ultra-low k SiCOH films, however, may have poor mechanical properties, such as, for example, a high crack velocity and stress, and a low modulus and hardness. Further, SiCOH dielectric films may deteriorate as the k of the material decreases. Hence, porous SiCOH dielectrics may have disfavored mechanical properties compared to the corresponding non-porous SiCOH dielectrics.
Improved mechanical properties of low k or ultra-low k SiCOH dielectrics can be achieved by treating the SiCOH films post deposition. For example, curing or treatment using thermal, UV light, electron beam irradiation, chemical energy or a combination of these energy sources has been used to stabilize the low or ultra-low k dielectric material and to improve the mechanical properties of the same. While such post deposition treatments are possible, they add extra processing steps and thus cost to the manufacturing of low k or ultra-low k dielectric films.